| 1. | Logic level indicator
逻辑电平指示器 |
| 2. | Specification for analogue voltage ranges and logic levels for mains operated nuclear instruments
电源控制的核仪表的模拟电压范围和逻辑电平规范 |
| 3. | When the keyboard or mouse wants to send information , it first checks the clock line to make sure it ' s at a high logic level
当键盘或者鼠标想发送数据时，它首先必须检查时钟线，确认它处于高电平。 |
| 4. | The focus of our research in the low - power design of viterbi decoders is reduction of dynamic power dissipation at logic level in the standard cell design environment
从这里发掘功耗的潜力是很大的,主要通过优化算法、优化逻辑结构来实现。 |
| 5. | Functions of logic synthesis are to transform and optimize the combinational logic functions and produce the pure logic level structural description
逻辑综合的功能是对组合逻辑函数的描述进行转换和优化，生成与逻辑功能描述等价的优化的逻辑级纯结构描述。 |
| 6. | Based on java concept , j2ee renders a type of high - level api independent of realization which implements a separation of application in logic level and system level
J2ee规范基于java概念，它提供的独立于实现的高层api ，能够实现应用程序逻辑层与系统层的分离。 |
| 7. | The hierarchy provided by . net template can be divided to system framework level , data access level , business logic level , business presentation level and user interface level
. net模板给出了企业级分布式应用程序的层次结构，分为系统框架层、数据访问层、业务规则层、业务外观层和用户界面层。 |
| 8. | The thesis researches on the methodology for energy efficient soc design . soc has several design levels according to the design flow . the thesis covers on the higher levels including system level , software level , and synthesizable logic level
本文主要从可综合的逻辑层以上的设计层次来进行soc低功耗设计方法论的研究，这些层次与工艺无关，包括系统设计、软件设计和可综合逻辑设计层次。 |
| 9. | Beginning with software component technology , a software - bus - architecture - based special software development model is designed . the key technology such as system structure , logic levels , communication structure and application programming inerface ( api ) of software bus are detailedly described
本文从软构件技术出发,提出了一种基于软件总线体系结构的专用软件开发模式,详细讨论了该系统的体系结构和逻辑层次、软总线的通信结构以及总线api等关键技术。 |
| 10. | These research works include presenting the high performance realization techniques for all of the usually basic functional units at the logic level , the basic rules and experiences of how to realize the high performance digital circuits by fpga or standard cells
所做的研究工作包括：运用逻辑平衡的思想提出了常用的基本运算单元的高性能解决方案，分析了用fpga实现高速数字电路的基本理论方法，研究了用标准单元实现高速数字电路的基本理论方法。 |
